» Từ khóa: Low power

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Analysis of techniques for low power D Flip-Flop implementation

Analysis of techniques for low power D Flip-Flop implementation: Graduation thesis of Computer Engineering Technology/ Nguyen Thanh Duy Thanh, Vu Duc Thoai; Do Duy Tan (Supervisor). -- Ho Chi Minh City: Ho Chi Minh City University of Technology and Education, 2025 Call no. : KTM-19 621.3815 N573-T367

81 p hcmute 13/08/2025 39 0

Từ khóa: Digital Electronics, Low Power Flip-Flop, Do Duy Tan, Vu Duc Thoai
Dual-switch power gating technique with small energy loss, low area, short crossover time, and fast wake-up time for fine-grain leakage controlled VLSIs

In this paper, we compared various power gating schemes in terms of energy loss, crossover time, and wake-up time using the 45-nm Predictive Technology Model. In this comparison, the Dual-Switch Power Gating (DSPG) shows smaller energy loss, shorter crossover time, faster wake-up time than the other power gating schemes such as the Single-Switch and Charge-Recycled Power Gating schemes. Based on these advantages, the DSPG is suggested in this...

7 p hcmute 06/07/2017 588 3

Từ khóa: low-leakage; power gating; sleep transistor; fine-grain leakage control; crossover time; wake-up time
A NOVEL CHARGE RECYCLING TECHNIQUE FOR SAVING LEAKAGE POWER IN LOW Vth CMOS CIRCUITS

In this paper, we use an innovative power gating technique to charge recycling the lost energy. We compare conventional circuits and circuit using dual-charge recycling power gating technique in term of the power consumption using the 45 nm Predictive Technology Model. Since we design circuits that it reduces the power consumption of the circuit in the sleep mode, saves energy and costs for the user.

5 p hcmute 06/07/2017 689 2

Từ khóa: Power gating, low power, leakage current, CMOS Classification: Integrated circuits

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