» Từ khóa: clock gating

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Power consumption optimization for VLSI designs using ICC & DC EDA tools and CMOS 32NM EDK synopsys technology

Power consumption optimization for VLSI designs using ICC & DC EDA tools and CMOS 32NM EDK synopsys technology: Graduation project of Computer engineering technology/ Nguyen Le Gia Lam, Phu Quoc Huy; Pham Van Khoa (Advisor)--Ho Chi Minh City: Ho Chi Minh City University of Technology and Education, 2023 Call no.: KMT-19 621.3745 N573-L213

67 p hcmute 07/06/2024 180 13

Từ khóa: Clock gating, Power consumption, Nguyễn Lê Gia Lâm
Evaluation of Performance of clock gating techniques in digital circuit design

Evaluation of Performance of clock gating techniques in digital circuit design: Graduation Project of Computer Engineering Technology/ Khuu Hoang Duy, Truong Van Ty; Do Duy Tan (Advisor)--Ho Chi Minh City: Ho Chi Minh City University of Technology and Education, 2023 Call no.: KTM-19 681.1 K45-D988

57 p hcmute 22/02/2024 124 10

Từ khóa: Clock gating techniques, Digital circuit design, Do Duy Tan, eAdvisor

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