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Evaluation of Performance of clock gating techniques in digital circuit design
Evaluation of Performance of clock gating techniques in digital circuit design: Graduation Project of Computer Engineering Technology/ Khuu Hoang Duy, Truong Van Ty; Do Duy Tan (Advisor)--Ho Chi Minh City: Ho Chi Minh City University of Technology and Education, 2023 Call no.: KTM-19 681.1 K45-D988
57 p hcmute 22/02/2024 111 10
Từ khóa: Clock gating techniques, Digital circuit design, Do Duy Tan, eAdvisor